Method of forming contact holes
US5320932A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 7, 1991 |
| Grant date | Jun 14, 1994 |
| Priority date | — |
| Expiry date | May 7, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/2022
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a method of forming contact holes in an interstage insulation layer having a thick portion on the semiconductor substrate in which a first contact hole leading to the substrate surface is to be formed and a thin portion on an electrode in which a second contact hole leading to the electrode is to be formed, a positive-type resist layer is formed on the interstage insulation layer. Then first and second portions of the resist layer which are aligned with the first and second contact holes to be formed are exposed to light, and thereafter the resist layer is heated, thereby making the exposed first and second portions insoluble in a developer. Thereafter, the first portion of the resist layer is exposed to light and then subjected to a developing treatment to form an opening in the first portion of the resist layer. Using the resultant resist layer as a mask, the interstage insulation layer is subjected to an etching process to etch the first portion (thick portion) thereof by a predetermined thickness so as to have substantially the same thickness as that of the second portion (thin portion) of the same. Thereafter, the second portions of the resist layer are exposed to light and…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.