Categorized pixel variable buffering and processing for a graphics system
US5321809A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 11, 1992 |
| Grant date | Jun 14, 1994 |
| Priority date | — |
| Expiry date | Sep 11, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T17/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A modified frame buffer and pixel variable read-modify-write method are described for a high performance computer graphics system. Pixel variables are initially classified as decision variables, intensity variables or decision/intensity variables. Only decision/intensity variables requiring a read-modify-write operation, are stored in dual interleaved DRAMs for improved bandwidth. Decision variables and intensity variables each utilize a single address/data bus per video RAM module in the frame buffer, while decision/intensity variables require dual address/data buses for accessing the interleaved memory banks. Enhanced bandwidth is obtained with a minimization of raster engine I/O requirements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.