Field effect real space transistor
US5323030A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 1993 |
| Grant date | Jun 21, 1994 |
| Priority date | — |
| Expiry date | Sep 24, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D48/362
Abstract
The present Field Effect Real Space Transistor, or FERST, is a four terminal device with S, G, C, and D representing the source, gate, collector, and drain, respectively. The S, G, and D terminals can be likened to those of the MODFET. The collector name is borrowed from other real space transfer devices. Surrounding the entire device is an oxygen implant isolation. The source and drain ohmic contacts penetrate to the 150 .ANG. GaAs channel while the collector ohmic contact does not penetrate due to its position upon an elevated submesa. AlGaAs layers are used as etch stops during processing of the device and a Schottky barrier gate is placed on an undoped layer. Channel carriers are provided by modulation doping the lower barrier of the channel. An Al.sub.0.35 Ga.sub.0.65 As layer on the upper channel side is used as a real space transfer barrier. In operation and under appropriate bias conditions, real space transfer occurs across this upper barrier and into the collector. Voltage is applied to the device between the drain and source which heats up electrons in the channel to an energized state. Field effect control by the gate then adjusts the voltage distribution throughout the…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.