Method for generating functional tests for printed circuit boards based on pattern matching of models
US5323108A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 23, 1992 |
| Grant date | Jun 21, 1994 |
| Priority date | — |
| Expiry date | Jan 23, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2806
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for generating a functional test for a loaded printed circuit board automatically generates a test for a cluster of elements which may be tested together as a functional unit by pattern matching with pre-defined cluster models contained in a library. The method includes the following steps. First, an electrical description of the printed circuit board is analyzed to identify any clusters of elements which match any pre-defined cluster models. When a match is found, a generic test routine is retrieved from the model and used to generate a functional test for the cluster of elements on the printed circuit board. Thereafter, tests are generated for remaining, non-clustered devices by matching each device to a generic model within a device models library, and then retrieving a generic test routine therefrom.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.