Method and apparatus for maximizing process throughput
US5323403A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 13, 1992 |
| Grant date | Jun 21, 1994 |
| Priority date | — |
| Expiry date | Oct 13, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/221
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Two identical CRC circuits are cross coupled to make alternate CRC calculations based on the other CRC circuit's calculation. Throughput of the CRC code calculation is improved by applying alternate input data simultaneously at each of the CRC circuits so that when one calculation is completed the next input data is available to immediately begin the next calculation. The output of each CRC circuit is fed into one of two latches that make up an LSSD register such that the first latch captures the first CRC calculation on a first clock of non-overlapping clocks. The second CRC calculation is captured by the second latch on a second clock of the non-overlapping clocks. Two CRC calculations can be made in one period of the non-overlapping clocks while avoiding race problems.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.