Multistage decoder
US5323424A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 1992 |
| Grant date | Jun 21, 1994 |
| Priority date | — |
| Expiry date | Mar 27, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/3438
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A multistage decoder for decoding received symbols formed by symbols which have been subjected to multilevel coding in several successive partitioning levels from a constellation into several subsets. A symbol of the constellation is coded into several bits, and each stage of the multistage decoder determines a sequence of bits relative to a partitioning level for a sequence of estimated symbols which are selected from among the symbols of the constellation or of the subset as being each individually closest to the received symbols. The invention is characterized in that for at least one stage at least one detector generates an erasure bit for the estimated symbols whenever a received symbol lies in a predetermined erasure zone, whereupon the stage decoder then corrects the erasure bits. The decoder may operate in the adaptive or non-adaptive mode. The erasure zones may be angular sectors or bands of constant width. The widths of the zones are stored in preprogrammed memories.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.