True least recently used replacement method and apparatus
US5325511A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 1993 |
| Grant date | Jun 28, 1994 |
| Priority date | — |
| Expiry date | Sep 14, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0831
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus for performing Least Recently Used techniques for a four way set associative cache system which includes a random access memory (RAM) which stores the ways representing the least recently used (LRU), most recently used (MRU) and LRU+1. The MRU-1 is developed by XORing the other three LRU way information values. Processor or snoop operation is determined and the way use aging information valued is based on snooping or processor operations. For processor operations the accessed or to be accessed way is set as the MRU, while in snoop operations, the way being accessed is set as the LRU. The aging of the remaining ways is shuffled accordingly. This shuffling occurs each cycle but is only stored on processor cache hit, processor read cache miss and snoop hit operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.