Method for electrodepositing corrosion barrier on isolated circuitry
US5326412A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 1992 |
| Grant date | Jul 5, 1994 |
| Priority date | — |
| Expiry date | Dec 22, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/4916
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A corrosion resistant barrier is provided for isolated circuity. An isolated circuit (10, 12) with raised interconnection features (16, 18) having a corrosion resistant gold coating (34) is formed on a reusable stainless steel mandrel (22) which is provided with indentations to define raised features. A seed layer (32) of copper is electroplated on the mandrel in a pattern of the isolated circuit to be formed. The copper seed layer (32) is then followed by electroplated layers of gold (34), nickel (36) and copper (38) until a total desired conductor thickness is achieved. A dielectric substrate (44, 46) is laminated on the multilayer conductive traces of the circuit. After removal of the multilayer circuit from the mandrel, a predrilled dielectric coverlay (50) is laminated to the circuit with holes in the coverlay receiving the raised circuit features (52). The finished part is then etched to remove the copper seed layer from the raised features.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.