Multiplexer circuit less liable to malfunction
US5327022A · kind A · utility
4Cited by
5References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 19, 1992 |
| Grant date | Jul 5, 1994 |
| Priority date | — |
| Expiry date | May 19, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/693
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A multiplexer circuit comprises a plurality of circuits for decoding digital timing signals, and a plurality of circuits for passing an one of the analogue voltage potentials to an output terminal corresponding to the decoded result of the decoding circuits, and preventing the passing circuits from passing more than one signal simultaneously.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.