Semiconductor memory device
US5327388A · kind A · utility
13Cited by
3References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 29, 1992 |
| Grant date | Jul 5, 1994 |
| Priority date | — |
| Expiry date | Sep 29, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/147
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device with a power source voltage step-down circuit which generates a stepped-down voltage from electric power supplied from outside and supplies this stepped-down voltage to a memory cell array and peripheral circuits. Current switching device interposed in a circuit or circuits of the semiconductor memory device other than the memory cell array and a switch controlling signal generating means for generating a controlling signal in response to a signal from the outside are provided. The current switching device performs switching of current to flow through the circuit in response to a controlling signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.