Antifuse with nonstoichiometric tin layer and method of manufacture thereof
US5329153A · kind A · utility
67Cited by
8References
13Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 10, 1992 |
| Grant date | Jul 12, 1994 |
| Priority date | — |
| Expiry date | Apr 10, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An antifuse in an integrated circuit which has first and second conducting lines, a semiconductor layer of amorphous silicon between the first and second conducting lines, and a barrier metal layer of TiN between the semiconductor layer and the first conducting layer is disclosed. The TiN layer is nonstoichiometric composition to enhance the probability of said antifuse having a desired resistance when said antifuse is programmed. More specifically, the TiN layer has a composition of Ti.sub.1.0 N.sub.0.5-0.8.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.