Chopping type comparator with clocked inverter
US5329172A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 6, 1992 |
| Grant date | Jul 12, 1994 |
| Priority date | — |
| Expiry date | Nov 6, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/249
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The chopping type comparator is provided with a capacitor which receives at its one end two input signals to be compared with each other through first and second analog switches alternately switchable between a conductive state and a nonconductive state. A clocked inverter is connected at its input terminal to another end of the capacitor. The clocked inverter is changed to an inactive state when one of the first and second analog switches is made conductive. A third analog switch is coupled between the input and output terminals of the clocked inverter. The third analog switch is made conductive concurrently when said one of the first and second analog switches is made conductive.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.