Parallel MSD arithmetic using an opto-electronic shared content-addressable memory processor
US5333117A · kind A · utility
51Cited by
5References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 4, 1993 |
| Grant date | Jul 26, 1994 |
| Priority date | — |
| Expiry date | Oct 4, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06E1/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An opto-electronic shared content-addressable memory processor is used to perform parallel modified signed-digit (MSD) arithmetic operations. The MSD arithmetic operation (addition or subtraction of two N-bit numbers) is decomposed into a matrix-matrix multiplication followed by a combination of a threshold and logic operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.