Imaging system with multilevel dithering using bit shifter
US5333260A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 15, 1992 |
| Grant date | Jul 26, 1994 |
| Priority date | — |
| Expiry date | Oct 15, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N1/4051
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is an image processing system which relies upon quantization and dithering techniques to enable an output device, which has a given number of output levels, to accurately reproduce a image which is generated by an input device, which has a greater or equal number of input levels. Generally, neither the number of input nor output levels need to be a power of two. The present invention is implemented in a number of different embodiments. These embodiments generally rely upon an image processor which, depending on the particular implementation, includes memory devices and an adder, a comparator, or a bit shifter. Additional embodiments use an image adjustment system to refine the raw input levels of the input device, in order to create an improved output image. Also, the particular embodiments of the image processors can be used in connection with imaging systems having hi-tonal, monochromatic, or color input and output devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.