Semiconductor memory device having memory cells formed of one transistor and one capacitor and a method of producing the same

US5335196A · kind A · utility

Assignee

• NIPPON STEEL CORPORATION · JP

Inventor

• Kenji Anzai · Sagamihara, JP

Key dates

• Filing date: Apr 21, 1993
• Grant date: Aug 2, 1994
• Expiry date: Apr 21, 2013

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/318

Abstract

A semiconductor memory device having transistors and capacitors on a semiconductor substrate with the lower electrodes and the contact holes for connection with the sources of the transistors formed on a self-alignment basis and a method of producing the same are disclosed. The transistor of the semiconductor memory device formed on the semiconductor substrate has a first insulating layer, a gate electrode, a source portion and a drain portion. The source and drain portions dispose in the vicinity of the gate electrode, on opposite sides of each other relative to the gate electrode, under the first insulating layer and in the semiconductor substrate. The capacitor of the semiconductor memory device has a lower electrode connecting with the source portion, a second insulating layer between the lower electrode and the upper surface of the gate electrode, a third insulating layer covering the source-side sidewall of the second insulating layer and that of the gate electrode, and a fourth insulating layer covering the drain-side of the upper surface and the source-side sidewall of the second insulating layer and that of the gate electrode. Displacement from the upper surface of the ins…