Microcomputer using specific instruction bit and mode switch signal for distinguishing and executing different groups of instructions in plural operating modes
US5335331A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 12, 1991 |
| Grant date | Aug 2, 1994 |
| Priority date | — |
| Expiry date | Jul 12, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3822
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
To increase the kinds of executable instructions of a microcomputer without increasing the number of bits (e.g. 8 bits) constituting one word or instruction, that is, without decreasing the execution speed or increasing the ROM usage, two or more instruction groups including instructions of different kinds, respectively, are provided operation modes are determined for the respective instruction groups; and the respective instruction groups to be executed are switched according to the respective operation modes. The microcomputer includes an instruction register, an execution control unit, a mode memory flip-flop, gates, two predecoders, a programmable logic array, an arithmetic logic unit, etc. The ordinary and special instruction groups can be selected in response to an interrupt entry signal and an interrupt return signal and a specific bit of an instruction, for instance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.