Programmable data transfer timing
US5335337A · kind A · utility
5Cited by
13References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 27, 1989 |
| Grant date | Aug 2, 1994 |
| Priority date | — |
| Expiry date | Jan 27, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for providing asynchronous communication between at least one central processing unit (CPU) and at least one associated memory unit with specially programmed timing signals to latch, select and transmit data between them.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.