Spacer trays for stacking storage trays with integrated circuits
US5335771A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 14, 1993 |
| Grant date | Aug 9, 1994 |
| Priority date | — |
| Expiry date | Apr 14, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/68313
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system for storing integrated circuits in a stacked relationship comprising integrated circuit storage trays and spacer trays. Each integrated circuit storage tray has a storage pocket area for containing an integrated circuit. When portions of the integrated circuit protrude beyond the overall profile of the storage tray, a spacer tray can be interposed between adjacent storage trays. The spacer tray elevates an adjacent storage tray to clear the protruding portions of the integrated circuit. The spacer tray also includes tabs or other structures for overlying portions of each integrated circuit in an adjacent storage tray thereby to retain the integrated circuits within the storage tray.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.