BiCMOS process with low base recombination current bipolar transistors
US5336625A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 1, 1993 |
| Grant date | Aug 9, 1994 |
| Priority date | — |
| Expiry date | Oct 1, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/01
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for manufacturing an integrated circuit having both field effect and bipolar transistors provides, in one embodiment, a polycide film over the gate and field oxides. The polycide film is patterned such that a protective structure of gate material is formed on top the base region while the gate of the FET is formed, in a single process step. Ionic species are implanted to form the source and drain and the collector contact. The protective structure of gate material in the active region of the bipolar transistor is removed just before the base region is implanted to form the base. In a second embodiment, a silicon nitride oxidation mask for field oxide regions is formed over the bipolar transistor and the field effect transistor active regions. The portion of the nitride oxidation mask is removed only from the FET active regions after field oxide regions are formed. The portion of the nitride oxidation mask is left intact through formation of the gate regions of the FETs, formation of the oxide spacers of the FET active regions, and the formation of source and drain regions of the NMOS transistor. The nitride oxidation mask over the bipolar active region is removed prior to…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.