Bipolar transistor with an improved collector structure
US5336909A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 14, 1992 |
| Grant date | Aug 9, 1994 |
| Priority date | — |
| Expiry date | Aug 14, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D10/821
Abstract
In a very high speed bipolar transistor, an n.sup.+ -type GaAs collector layer and an n-type GaAs collector layer are stacked in an intrinsic transistor region, and an i-type GaAs collector layer is formed around the n.sup.+ -type GaAs collector layer and the n-type GaAs collector layer. An n-type GaAs collector layer is formed on the n.sup.+ -type GaAs collector layer such that a part of the n-type GaAs collector layer extends on the i-type GaAs collector layer. A p-type GaAs external base layer is formed outside the n-type GaAs collector layer. A p.sup.+ -type Al.sub.x Ga.sub.l-x As base layer is formed on the n-type GaAs collector layer. An emitter layer is formed such that it is arranged only in the intrinsic transistor region on the p.sup.+ -type Al.sub.x Ga.sub.l-x As base layer and constitutes a heterojunction together with the base layer. Design trade-off between the cutoff frequency and maximum oscillation frequency of the transistor is eliminated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.