Active negation emulator
US5336948A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 16, 1992 |
| Grant date | Aug 9, 1994 |
| Priority date | — |
| Expiry date | Dec 16, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0136
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An active negation emulator circuit for improving the noise margin of signals carried by a signal interface bus. The circuit includes a sensor for sensing the voltage on the bus and a variable current source for supplying a current to the bus when the voltage level thereon is greater than a predetermined value. More particularly, when the voltage level on the bus is indicative of the signal carried thereby being in a logic high state, a current is supplied to raise the voltage level to the desired logic high voltage level. A combination circuit is also provided including an active negation emulator circuit, a resistive terminator, and switch means for selectively coupling the active negation emulator to the signal interface bus, coupling the resistive terminator to the signal interface bus, or decoupling both the emulator and the terminator from the bus, in accordance with the location of the bus to which the combination circuit is coupled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.