Method for etching indium based III-V compound semiconductors
US5338394A · kind A · utility
13Cited by
7References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 1, 1992 |
| Grant date | Aug 16, 1994 |
| Priority date | — |
| Expiry date | May 1, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/30621
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
InP is etched by reactive ion etching using a mixture of SiCl.sub.4 and CH.sub.4 or a mixture of SiCl.sub.4 and H.sub.2. A mask is placed on the InP and then it is placed into a RIE chamber having a pressure between approximately 5 mTorr and approximately 50 mTorr. The InP substrate is etched at a substrate temperature of less than 150.degree. C.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.