Method of generating active semiconductor structures by means of starting structures which have a 2D charge carrier layer parallel to the surface

US5338692A · kind A · utility

Assignee

• Max-Planck-Gesellschaft zur Föderung der Wissenschaften e.V. · US

Inventors

• Andreas Wieck · Sindelfingen, DE
• Klaus Ploog · Stuttgart, DE

Key dates

• Filing date: May 3, 1993
• Grant date: Aug 16, 1994
• Expiry date: May 3, 2013

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/85
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A unipolar electronic component is proposed with a quasi one dimensional carrier channel which has all the characteristics of an FET. This component can be very simply produced, has "self-alignment" and linear gates with a low capacity in place of planar gates. In this way a very high operating frequency of the component is possible. The structure comprises an initially homogenous 2D-layer with a high carrier mobility which is formed by epitaxy of for example GaAs. The implantation of focussed ions (for example Ga.sup.+ with 100 keV) locally destroys the conductivity of the electron layer. The irradiated regions remain insulating at low temperature or room temperature even after illuminating the cristal with bandgap radiation. The writing in of the insulating layer is carried out along two paths on the chip so that the 2D-carrier layer is subdivided into three regions insulated from one another. The source and drain are only connected by a narrow channel 44 the width of which is continuously tunable by a gate potential which is simultaneously applied to the two gate regions relative to the source, so that a pronounced change of the carrier concentration and thus of the channel resi…