Parallel method and apparatus for detecting and completing floating point operations involving special operands
US5339266A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 1993 |
| Grant date | Aug 16, 1994 |
| Priority date | — |
| Expiry date | Nov 29, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/49905
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for detecting and completing floating point operations involving special floating point operands is performed in parallel, via a circuit (24), to the operation of at least one floating point mathematical unit (18, 20or 22). The floating point control (30) along with registers (14 and 16) provide floating point operands and floating point control to the mathematical units (18, 20, and 22). If the mathematical units (18, 20, and 22) cannot perform a proper floating point calculation because of the presence of a special operand, then the circuit (24) will detect the special operand and complete the floating point operation in a proper manner by communicating with the floating point control unit (30).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.