Semiconductor memory module
US5339269A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 30, 1992 |
| Grant date | Aug 16, 1994 |
| Priority date | — |
| Expiry date | Jul 30, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10159
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A memory module includes electrodes arranged on one side edge of a laminated substrate. A plurality of memory elements are mounted on the surface of the laminated substrate, wherein signal line electrodes for the memory elements are arranged on one side edge of the laminated substrate, and respective electrode terminals for a second power supply line and a second grounding line connected in parallel to a first power supply line and a first grounding line are provided on a surface of the laminated substrate. The electrodes are situated at a position at or near maximum amplitude of the potential distribution generated on the first power supply line and the first grounding line when the memory elements are driven.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.