Asynchronous TMR processing system
US5339404A · kind A · utility
75Cited by
13References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 28, 1991 |
| Grant date | Aug 16, 1994 |
| Priority date | — |
| Expiry date | May 28, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/184
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A triple modular redundancy computing system including three asynchronously connected processing elements, each having its own memory, a plurality of arbiters cross connecting processor elements for enforcing synchronization for tasks and for voting arbitration on output and without voting for inputs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.