Integrated circuit having alternate rows of logic cells and I/O cells
US5341049A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 21, 1992 |
| Grant date | Aug 23, 1994 |
| Priority date | — |
| Expiry date | Jul 21, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/11
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A semiconductor IC device has an input/output circuit and an internal logic circuit connected with the input/output circuit formed in a main surface of a semiconductor substrate of a generally rectangular shape. The input/output circuit is divided into at least two input/output circuit blocks in such a manner that edges of the logic circuit blocks defined by the division on the main surface of the substrate extend in a direction substantially parallel with a pair of opposite sides of the substrate. The internal logic circuit is divided into at least three logic circuit blocks in such a manner that edges of the logic circuit blocks defined by the division on the main surface of the substrate extend in the above-mentioned direction. Each of the input/output circuit blocks is sandwiched by and electrically connected with adjacently arranged two of the logic circuit blocks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.