Switched capacitor amplifier circuit operating without serially coupled amplifiers
US5341050A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 1992 |
| Grant date | Aug 23, 1994 |
| Priority date | — |
| Expiry date | Mar 20, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/331
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A switched capacitor circuit (10) is responsive to a two phase repetitive clock signal comprised of alternating periods (.phi.1) and (.phi.2). The circuit includes a first input branch including a first amplifier (A) for charging a first capacitance (C1) from a first input signal during period (.phi.2). The circuit further includes a second input branch that includes a second amplifier (B) for charging a second capacitance (CA) from a second input signal during a period (.phi.1A), and for charging a third capacitance (CB) from the second input signal during a period (.phi.1B); wherein (.phi.1A) and (.phi.1B) alternate in occurrence with one another during successive (.phi.1) periods. The circuit further includes switches for coupling the first capacitance and the second capacitance to an input of an output amplifier (C) during (.phi.1B), and for coupling the first capacitance and the third capacitance to the input of the output amplifier during (.phi.1A). The teaching of the invention provides for the interconnection of several switched capacitor branches without requiring that any two series connected amplifiers settle during the same clock phase.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.