Arbiter with test capability and associated testing method
US5341052A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 21, 1993 |
| Grant date | Aug 23, 1994 |
| Priority date | — |
| Expiry date | Oct 21, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An arbiter based on pairwise mutual exclusion produces an absolute priority signal (G) indicating that one of three or more requests (R.sub.1, R.sub.2, . . . R.sub.N) has gained absolute priority over all the other. At least one mutual-exclusion element (20.sub.1 or 20p) in the arbiter is designed so that its pairwise priority determination car be reversed in response to at least one externally originated test signal (T.sub.1, T.sub.2 or T.sub.M-1, T.sub.M). By doing so after the requests have been asserted in a specified order, a priority conflict can be generated among the requests in order to check the conflict-resolution capability of the arbiter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.