Semiconductor device and manufacturing method thereof
US5341324A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 1992 |
| Grant date | Aug 23, 1994 |
| Priority date | — |
| Expiry date | Sep 30, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B10/00
Abstract
A gate electrode of a P-channel MOS transistor and a gate electrode of an N-channel MOS transistor which constitute a logic section, a gate electrode of an N-channel MOS transistor and a capacitor electrode which constitute a memory cell section are formed by patterning a first layer of polysilicon, so that the semiconductor device can be manufactured in a considerably simplified process as an SRAM, while taking advantage of the large capacity of a DRAM thereby to improve the yield.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.