Viterbi equalizer and recording/reproducing device using the same
US5341386A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 23, 1991 |
| Grant date | Aug 23, 1994 |
| Priority date | — |
| Expiry date | May 23, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6502
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A viterbi equalizer includes a distributor for receiving a run length limited code and for calculating branch metrics responsive to the run length limited code. The branch metrics are related to only nodes and branches in a trellis state transition diagram based on a viterbi decoding algorithm defined for the run length limited code. The viterbi equalizer also includes a path metric calculating circuit, operatively coupled to the distributor, for generating path metrics on the basis of the branch metrics and for generating path select signals indicative of surviving paths coupling the nodes and branches. Further, the viterbi equalizer includes a path memory, operatively coupled to the path metric calculating circuit, for determining a maximum likelihood path on the basis of the path select signals output by the path metric calculating circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.