N-word read/write access achieving double bandwidth without increasing the width of external data I/O bus
US5341488A · kind A · utility
18Cited by
12References
8Claims
0Family size
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Key dates
| Filing date | Feb 14, 1992 |
| Grant date | Aug 23, 1994 |
| Priority date | — |
| Expiry date | Feb 14, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An N-word write access memory is described. Using a variation of conventional control signals RAS, CAS, WE and OE, an innovative scheme of signal protocol allows the N-bit word write memory to have an input/output bandwidth double that attained in the prior art, using substantially the same components and without affecting the bit-width, hence, the pin-count, of the external data bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.