Memory card with programmable interleaving
US5341489A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 14, 1992 |
| Grant date | Aug 23, 1994 |
| Priority date | — |
| Expiry date | Apr 14, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/2022
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory card that is detachably connectable to a host data processing system includes a plurality of flash EPROM memory devices for storing data input from the host system in addressable data locations in the memory devices. The card also includes a control circuit having further memory for storing an interleave factor input from the host system for specifying the order in which data is consecutively distributed among the memory devices. By selectively steering certain low order address bits to a chip select decoder, data is serially distributed into identical address locations in each memory device. By having the interleave factor variable, data may be distributed among a selected set of memory devices, thereby allowing the host system to relate the data transfer rate to the particular application.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.