Memory having nonvolatile and volatile memory banks
US5343437A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 19, 1993 |
| Grant date | Aug 30, 1994 |
| Priority date | — |
| Expiry date | Feb 19, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory (20) includes a nonvolatile memory array (32) and a volatile memory array (22). The nonvolatile memory array (32) is subdivided into banks of memory cells. The volatile memory array (22) may also be subdivided into multiple banks, and is smaller than the nonvolatile memory array (32). A transfer circuit (40) transfers the contents of a bank of nonvolatile memory array (32) into a bank of volatile memory array (22) before the data can be accessed by a processor (160). In addition, a preload decision logic circuit (180) may transfer a bank of nonvolatile memory array (32) into volatile memory array (22) invisibly to the processor (160), to have the data available when needed, thus avoiding a space fault. Coupling a smaller volatile memory array (22) to a nonvolatile memory array (32) combines the advantages of faster access times and nonvolatility without greatly increasing the size of the memory (20).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.