Competitive snoopy caching for large-scale multiprocessors
US5345578A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 19, 1993 |
| Grant date | Sep 6, 1994 |
| Priority date | — |
| Expiry date | Mar 19, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0813
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method of satisfying read and write requests is used in a system having a plurality of cache-equipped processors coupled into a hypercube structure via buses, where each processor is simultaneously coupled to other processors on other buses via gateway means. Read and write requests for a line of data from any of the processors are satisfied by forwarding an update or invalidate request for a given data block containing the line of data requested. This request is forwarded to all other buses on which the block is present. The present invention provides for responding to a read request for a line of data from a processor by forwarding the request, and resultant data, to one of the buses on which the block is stored, where each gateway responds to the request to forward the request along exactly one branch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.