Power semiconductor integrated circuit package
US5347160A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 28, 1992 |
| Grant date | Sep 13, 1994 |
| Priority date | — |
| Expiry date | Sep 28, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A hermetically sealed semiconductor package (10, 100, 200) in accordance with the invention and includes at least one integrated circuit (14, 15 or 16) with each integrated circuit having first (20) and second (22) opposed faces with the first face having at least one electrode (17-19) providing at least one first circuit connection to the integrated circuit and with the second face providing a second circuit connection to the integrated circuit; a thermally conductive base (32) thermally coupled to the second face for conducting heat generated by operation of the at least one integrated circuit; an insulator (30) electrically isolating the first circuit connection from the second circuit connection; a sidewall (34) extending upward from the base; and a lid (36) extending from the sidewall, the base, sidewall and lid forming a hermetically sealed cavity (12) in which the at least one integrated circuit is disposed and the lid having at least one depression (38) projecting inward below an inner and outer surface of the lid into the cavity and electrically contacting at least one of the circuit connections at a plane below the inner surface of the lid within the cavity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.