Patent · US Expired

Digital voltage controlled oscillator

US5347234A · kind A · utility

39Cited by
11References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 26, 1993
Grant dateSep 13, 1994
Priority date
Expiry dateMar 26, 2013

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03B27/00
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A digital phase lock loop is provided, comprising a digital voltage controlled oscillator, a phase detector, and an up/down counter. The digital voltage controlled oscillator is responsive to a first set of control signals received from the up/down counter to provide an output signal. The phase detector receives and compares the frequency of the output signal with the frequency of a reference signal and, based on the comparison, outputs to the up/down counter a second control signal which determines the status of the first set of control signals. The digital voltage controlled oscillator comprises (i) an array of delay elements and (ii) a decoder for receiving the first set of the control signals from the up/down counter and for selectively activating one or more of the delay elements in response thereto. The decoder provides a separate output line for each of the delay elements which is to be selectively activated. The logic required to implement the decoder requires only a single AND gate and a single OR gate for each of the delay elements in the array.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.