Semiconductor memory device and method of reading out information for the same
US5349221A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 20, 1992 |
| Grant date | Sep 20, 1994 |
| Priority date | — |
| Expiry date | Oct 20, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/685
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a memory cell according to the present invention, when positive high voltages are respectively applied to a gate( 20 ) and a drain region( 14 ) and a source region( 13 ) is grounded, hot electrons are produced in the boundary between the drain region(14) and a channel(25). The hot electrons are locally injected into an insulation film(19), to be trapped therein. Consequently, information is written. At the time of reading out information, the drain region(14) is grounded, a positive read voltage is applied to the source region(13), and a predetermined sense voltage is applied to the gate(20). At this time, the area between the source and the drain is kept in a non-conduction state if electrons are stored in the insulation film(19), while conduction occurs between the source and the drain if no electrons are stored therein. Since the formation of the channel(25) in the vicinity of the drain region(14) is delayed at the time of reading, thereby to make it possible to increase a threshold voltage, therefore, information can be accurately read out. No hot electrons are produced in the boundary between the drain region(14) and the channel(25) at the time of reading, it is possible to…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.