Patent · US Expired

Digitally controlled fractional frequency synthesizer

US5349310A · kind A · utility

24Cited by

7References

4Claims

0Family size

Assignee

Alcatel Network Systems, Inc. · US

Inventors

Klaus Rieder · Stuttgart, DE
Gunter Horsch · Weil der Stadt, DE
William E. Powell · Hersbruck, DE

Key dates

Filing date	Jun 9, 1993
Grant date	Sep 20, 1994
Priority date	—
Expiry date	Jun 9, 2013

Classification

Technology area (CPC H)Electricity
CPC primaryH03L7/185
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

The circuit arrangement of the invention presents an oscillator, whose frequency can be linearly varied within a wide control range, without affecting the oscillator's stability. The frequency of a fixed frequency generator (1) is divided to the desired frequency by a frequency divider (2), whose divider ratio can be varied in very small steps, and the resulting jitter is filtered out by a very simple phase control circuit (3). Improved short-term stability and holdover performance are also achieved. The oscillator can be universally used as clock generator in all digital circuit arrangements.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.