Low noise, low distortion MOS amplifier circuit
US5351011A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 12, 1993 |
| Grant date | Sep 27, 1994 |
| Priority date | — |
| Expiry date | Nov 12, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/3211
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In the case of amplifier circuits realised in modern MOS technology, non-linear distortion occurs as a result of the high field strengths in the channel region due to the small dimensions. This distortion is eliminated and noise is reduced in that the amplifier circuit comprises a first series combination of first and second MOS transistors, and a second series combination identical with the first series combination and forming a long tailed pair circuit with the latter. The long tailed pair circuit includes an additional differential amplifier having its output connected to the gate electrode of a load transistor of the long tailed pair circuit by way of a voltage divider. The transistors in the long tailed pair circuit are mutually identical.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.