Premature termination of microcontroller EEPROM write
US5351216A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 1993 |
| Grant date | Sep 27, 1994 |
| Priority date | — |
| Expiry date | Mar 5, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05B2219/25301
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A single chip, semiconductor microcontroller device is adapted to control an aspect of the operation of an external system. The device includes a CPU, program memory for storing instructions to be selectively executed by the CPU to perform the control functions, and peripheral EEPROM data memory adapted to be written to for storing selected data in selected ones of a multiplicity of addresses of the data memory and for selective retrieval of the stored dam by the CPU within its control function. Internal logic in the device is implemented to abort a write operation in progress on the EEPROM data memory upon occurrence of an asynchronous reset of the device. An error flag is set by the logic to indicate that the write operation is being aborted, and the data that was partially written to the EEPROM memory at the time the write operation was aborted is held intact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.