Multistep analog-to-digital converter with error correction
US5353027A · kind A · utility
25Cited by
3References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 26, 1992 |
| Grant date | Oct 4, 1994 |
| Priority date | — |
| Expiry date | Oct 26, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/145
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A sub-ranging analog-to-digital converter includes, in cascade, a coarse converter, a digital-to-analog converter, a subtracter circuit and a fine converter. Errors of the coarse converter are detected in the fine converter by means of an overflow detector and an underflow detector which generate an overflow signal (OF) and an underflow signal (UF), respectively. The digital output (D.sub.A) of the coarse converter is corrected by first subtracting one LBS in a decoder and then, in response to the overflow and underflow signal, adding thereto zero, one or two LBSs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.