Dielectric vias within multi-layer 3-dimensional structures/substrates
US5354599A · kind A · utility
31Cited by
5References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 27, 1993 |
| Grant date | Oct 11, 1994 |
| Priority date | — |
| Expiry date | Sep 27, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/24926
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An array of dielectric vias formed in the insulating layers of a unitized multilayer circuit structure wherein the dielectric vias have a dielectric constant different from the dielectric constant of the insulating layers in which they are formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.