Clock start up stabilization for computer systems
US5355397A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 1992 |
| Grant date | Oct 11, 1994 |
| Priority date | — |
| Expiry date | Sep 24, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/13
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Utilization circuits, such as logic chip circuits, are prevented from receiving the initial one or more pulses of a train of clock pulses produced after the master system clock is started, while the pulses of that train occurring thereafter are coupled to the utilization circuit. This prevents the skew usually present between the initial pulses of the train relative to the subsequent train pulses from adversely effecting operation of the utilization circuits. This clock swallowing preferably blocks a certain predetermined number of initial clock pulses from reaching the rest of the circuitry, although the system is adaptable to allow preselection of the number of such swallowed pulses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.