Data storing device having a plurality of registers allotted for one address
US5355465A · kind A · utility
4Cited by
5References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 11, 1991 |
| Grant date | Oct 11, 1994 |
| Priority date | — |
| Expiry date | Jun 11, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data storing device has at least first to third registers. When the first register is accessed, the second register is set into an accessible state in a preset cycle succeeding to a cycle in which the first register is accessed. The same address as that of the second register is assigned to the third register and access to the third register is inhibited in a preset cycle in which the second register is accessed. An access control circuit controls permission/inhibition of access to the second and third registers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.