Method of fabricating metallized chip carries from wafer-shaped substrates
US5358826A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 1992 |
| Grant date | Oct 25, 1994 |
| Priority date | — |
| Expiry date | May 8, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/915
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for simultaneously manufacturing metallized carriers from wafer-shaped substrates is described, wherein such wafer-shaped substrates permit the use of standard IC fabrication apparatus and methods. As a result, very thin and finely dimensioned traces can be deposited. Thin-film manufacturing techniques are used to create the high-density traces on the surface of the chip carriers, thereby permitting direct connections from the IC to the periphery of the carrier without the need for vias. A lid hermetically seals and protects the package. The traces are comprised of a plurality of metals to facilitate bonding, each of the metals homogeneous for a portion of the trace. One metal portion of the trace is of a type compatible with an IC chip placed in the carrier. Another metal portion of the trace is of a type compatible with a trace on a printed circuit board. A metal barrier is interposed between the metals to prevent metal diffusion from one metal to an adjoining portion of another metal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.