MOS semiconductor memory device having stack capacitor with metal plug
US5359217A · kind A · utility
8Cited by
3References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 10, 1993 |
| Grant date | Oct 25, 1994 |
| Priority date | — |
| Expiry date | Aug 10, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/31
Abstract
A semiconductor memory device comprising a semiconductor substrate, a MOS transistor formed on the semiconductor substrate and having source and drain diffused layers and a gate, an interlayer insulating film covering the MOS transistor, a contact hole formed in the interlayer insulating film so as to reach one of the source and the drain diffused layers, a metallic layer filling up the contact hole and a capacitor formed on the interlayer insulating film and connected electrically to the one diffused layer through the metallic layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.