Clock multiplication circuit and method
US5359232A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 1992 |
| Grant date | Oct 25, 1994 |
| Priority date | — |
| Expiry date | Nov 13, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/15026
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit, such as a microprocessor or math coprocessor, having a clock generator circuit for generating a high frequency internal clock signal based on an external input signal is disclosed. A clock generator circuit comprises circuitry for detecting an active edge of an input signal, circuitry for generating a plurality of clock edges responsive to the detection of the clock signal and circuitry for inhibiting the edge generating circuitry after generation of a predetermined number of clock edges. The factor by which the input clock signal is multiplied may be set by the circuit designer, or programmably set, without impact on the circuit design. Hence, a single circuit may be used to generate clocks of various frequencies. Further, the duty cycle of the generated clock is independent of the input clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.