Displays
US5359260A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 4, 1991 |
| Grant date | Oct 25, 1994 |
| Priority date | — |
| Expiry date | Dec 4, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J31/125
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A solid-state display comprises a glass plate on which is deposited an upper layer of parallel conductive tracks interrupted by recesses containing regions of conductive or semiconductive phosphor. An array of ballistic transistors within a semiconductor layer is in alignment on one side with the phosphor regions and on the other side with lower conductive tracks which extend at right angles to the tracks in the upper layer. When a voltage is applied to one of the tracks in the upper layer which is positive with respect to the voltage applied to one of the lower tracks it causes one of the transistors to emit electrons upwardly into the adjacent phosphor region. This causes fluorescence of the region and the emission of light through the glass plate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.