Method for manufacturing a component with porous silicon
US5360759A · kind A · utility
20Cited by
12References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 17, 1993 |
| Grant date | Nov 1, 1994 |
| Priority date | — |
| Expiry date | Sep 17, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/96
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
For manufacturing a component with porous silicon, two highly doped regions with a lightly doped region arranged between them are formed in a silicon wafer. The dopant concentrations are thereby set such that porous silicon arises in the lightly doped region in a subsequent anodic etching. Light-emitting diodes or light-controlled bipolar transistors can be manufactured in this way.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.